Circuit Designs
I/O Circuit
SOFA CHD FPGA share the same I/O circuit design as SOFA HD FPGA. See details at I/O Circuit.
Multiplexer
Routing multiplexer are designed by using a few custom cells based on the Skywater High-Density (HD) PDK, as shown in Fig. 30. The multiplexer design follows a two-level structure, which is applied to all the routing multiplexers in logic elements, connection blocks and switch blocks across the FPGA fabric.
Each primitive in the two-level structure could be a 2/3/4-input custom cell, depending on the input size of the routing multiplexer. Each custom cell is built with input inverters and transmission-gates. For instance, Fig. 31 shows the transistor-level design of a 3-input custom cell.
Note
Each routing multiplexer has a dedicated input which is connected to ground (GND) signal. When it is not used, the output will be driven by the ground, working as a constant generator.