Skywater-OpenFPGA Chips
stable

Device Family

  • Introduction
  • HD FPGAs

Datasheets

  • SOFA HD
  • QLSOFA HD
  • SOFA CHD

Appendix

  • Contacts
  • Acknowledgment
Skywater-OpenFPGA Chips
  • »
  • Welcome to SOFA documentation!
  • Edit on GitHub

Welcome to SOFA documentation!¶

Device Family

  • Introduction
  • HD FPGAs
    • Device Comparison
    • DC and AC Characteristics
      • Recommended Operating Conditions
      • Typical AC Characteristics
    • Chip Gallery
      • SOFA HD
      • QLSOFA HD
      • SOFA CHD

Datasheets

  • SOFA HD
    • Architecture
    • I/O Resources
    • Configurable Logic Block
    • Circuit Designs
    • Timing Annotation
  • QLSOFA HD
    • Architecture
    • I/O Resources
    • Configurable Logic Block
    • Circuit Designs
    • Timing Annotation
  • SOFA CHD
    • Architecture
    • I/O Resources
    • Configurable Logic Block
    • Circuit Designs
    • Timing Annotation
    • Custom Cells

Appendix

  • Contacts
  • Acknowledgment

For more information on the OpenFPGA see openfpga_doc or openfpga_github

For more information on the VPR architecture description language see xml_vtr

For more information on the Skywater 130nm PDK see skywater_pdk_github

Indices and tables¶

  • Index

  • Module Index

  • Search Page

Next

© Copyright 2020, Xifan Tang. Revision 2332e79e.

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