Skywater-OpenFPGA Chips
stable

Device Family

  • Introduction
  • HD FPGAs

Datasheets

  • SOFA HD
  • QLSOFA HD
    • Architecture
    • I/O Resources
    • Configurable Logic Block
    • Circuit Designs
    • Timing Annotation
  • SOFA CHD

Appendix

  • Contacts
  • Acknowledgment
Skywater-OpenFPGA Chips
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  • QLSOFA HD
  • Edit on GitHub

QLSOFA HDΒΆ

  • Architecture
    • Floorplan
    • Tiles
    • Routing Architecture
    • Scan-chain
  • I/O Resources
    • Pin Assignment
    • External I/Os
    • Accelerator Mode
    • Debug Mode
  • Configurable Logic Block
    • Generality
    • Multi-mode Logic Element
    • Scan Chain
  • Circuit Designs
    • I/O Circuit
    • Multiplexer
  • Timing Annotation
    • Configurable Logic Block
    • I/O Block
    • Routing Architecture
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© Copyright 2020, Xifan Tang. Revision 2332e79e.

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